Lain-Jong Li
70Patents
11h-index
82Co-inventors
81Inventor score
Filing activity: May 26, 2000 → Feb 5, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6602779B1 | Method for forming low dielectric constant damascene structure while employing carbon doped silicon oxide planarizing stop layer | Electricity | 162 | Expired |
| US6319809A | Method to reduce via poison in low-k Cu dual damascene by UV-treatment | Electricity | 48 | Expired |
| US6407013B1 | Soft plasma oxidizing plasma method for forming carbon doped silicon containing dielectric layer with enhanced adhesive properties | Electricity | 33 | Expired |
| US6372661B1 | Method to improve the crack resistance of CVD low-k dielectric constant material | Emerging Cross-Sectional Technologies | 32 | Expired |
| US6756321B2 | Method for forming a capping layer over a low-k dielectric with improved adhesion and reduced dielectric constant | Emerging Cross-Sectional Technologies | 25 | Expired |
| US6358839B1 | Solution to black diamond film delamination problem | Electricity | 24 | Expired |
| US8592291B2 | Fabrication of large-area hexagonal boron nitride thin films | Emerging Cross-Sectional Technologies | 24 | Active |
| US6483173B2 | Solution to black diamond film delamination problem | Electricity | 20 | Expired |
| US9478796B2 | Graphene-containing electrodes | Emerging Cross-Sectional Technologies | 19 | Active |
| US6812135B2 | Adhesion enhancement between CVD dielectric and spin-on low-k silicate films | Electricity | 15 | Expired |
| US6657284B1 | Graded dielectric layer and method for fabrication thereof | Electricity | 12 | Expired |
| US6753260B1 | Composite etching stop in semiconductor process integration | Electricity | 11 | Expired |
| US8685843B2 | Direct growth of graphene on substrates | Electricity | 9 | Active |
| US9327981B2 | Method for producing thin graphene nanoplatelets and precusor thereof | Chemistry; Metallurgy | 7 | Active |
| US6645864B1 | Physical vapor deposition of an amorphous silicon liner to eliminate resist poisoning | Electricity | 7 | Expired |
| US6654109B2 | System for detecting surface defects in semiconductor wafers | Physics | 6 | Expired |
| US6806185B2 | Method for forming low dielectric constant damascene structure while employing a carbon doped silicon oxide capping layer | Electricity | 6 | Expired |
| US6878621B2 | Method of fabricating barrierless and embedded copper damascene interconnects | Electricity | 3 | Expired |
| US6794295B1 | Method to improve stability and reliability of CVD low K dielectric | Electricity | 3 | Expired |
| US11037783B2 | Field effect transistor using transition metal dichalcogenide and a method for forming the same | Electricity | 3 | Active |
| US11430666B2 | Semiconductor device and method of manufacturing semiconductor device | Electricity | 3 | Active |
| US6908773B2 | ATR-FTIR metal surface cleanliness monitoring | Physics | 3 | Expired |
| US6620745B2 | Method for forming a blocking layer | Electricity | 2 | Expired |
| US6759342B2 | Method of avoiding dielectric arcing | Electricity | 2 | Expired |
| US9637839B2 | Synthesis and transfer of metal dichalcogenide layers on diverse surfaces | Electricity | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.