Systems and methods for configuration of a configuration bit with a value
US11757451B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2022 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Feb 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/78
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present disclosure is drawn to, among other things, a configuration bit including at least four resistive elements and a voltage amplifier. At least two first resistive elements may be electrically connected in series via a first electrode and at least two second resistive elements may be electrically connected in series via a second electrode. The at least two first resistive elements may be electrically connected in parallel to the at least two second resistive elements via a third electrode and a fourth electrode. The first electrode and the second electrode may be electrically connected to a voltage supply. The third electrode and the fourth electrode may be electrically connected to an input of the voltage amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.