Susceptor for semiconductor substrate processing
US11764101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2020 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Apr 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67248
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A susceptor for semiconductor substrate processing is disclosed herein. In some embodiments, the susceptor may comprise an inner susceptor portion and an outer susceptor portion. The susceptor portions may self-align via complementary features, such as tabs on the outer susceptor and recesses on the inner susceptor portion. The inner susceptor portion may contain several contact pads with which to support a wafer during semiconductor processing. In some embodiments, the contact pads are hemispherical to reduce contact area with the wafer, thereby reducing risk of backside damage. The inner susceptor portion may contain a cavity with which to receive a thermocouple. In some embodiments, the diameter of the cavity is greater than the diameter of the thermocouple such that the thermocouple does not contact the walls of the cavity during processing, thereby providing highly accurate temperature measurements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.