Porous polyurethane polishing pad and process for producing the same
US11766759B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2019 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Nov 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldMacromolecular chemistry, polymers
- WIPO sectorChemistry
Abstract
Embodiments relate to a porous polyurethane polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors and a process for preparing the same. According to the embodiments, the size and distribution of the plurality of pores contained in the porous polyurethane polishing pad can be adjusted. Thus, it is possible to provide a porous polyurethane polishing pad that has enhanced physical properties such as a proper level of withstand voltage, excellent polishing performance (i.e., polishing rate), and the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.