Method for controlling a manufacturing process and associated apparatuses
US11768441B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2021 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Feb 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for controlling a process of manufacturing semiconductor devices, the method including: obtaining a first control grid associated with a first lithographic apparatus used for a first patterning process for patterning a first substrate; obtaining a second control grid associated with a second lithographic apparatus used for a second patterning process for patterning a second substrate; based on the first control grid and second control grid, determining a common control grid definition for a bonding step for bonding the first substrate and second substrate to obtain a bonded substrate; obtaining bonded substrate metrology data including data relating to metrology performed on the bonded substrate; and determining a correction for performance of the bonding step based on the bonded substrate metrology data, the determining a correction including determining a co-optimized correction for the bonding step and for the first patterning process and/or second patterning process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.