Method for preparing semiconductor device structure with manganese-containing lining layer
US11776912B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 23, 2022 |
| Grant date | Oct 3, 2023 |
| Priority date | — |
| Expiry date | Apr 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for preparing a semiconductor device structure is provided. The method includes forming a first conductive layer over a semiconductor substrate, and forming a first dielectric layer over the first conductive layer. The first conductive layer includes copper. The method also includes etching the first dielectric layer to form a first opening exposing the first conductive layer, and forming a first lining layer and a first conductive plug in the first opening. The first lining layer includes manganese, the first conductive plug includes copper, and the first conductive plug is surrounded by the first lining layer. The method further includes forming a second conductive layer over the first dielectric layer, the first lining layer and the first conductive layer. The second conductive layer includes copper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.