Processing chamber with annealing mini-environment
US11791176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2019 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Sep 13, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods to process one or more wafers are described. The apparatus comprises a chamber defining an upper interior region and a lower interior region. A heater assembly is on the bottom of the chamber body in the lower interior region and defines a process region. A wafer cassette assembly is inside the heater assembly and a motor is configured to move the wafer cassette assembly from the lower process region inside the heater assembly to the upper interior region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.