Nanostructure field-effect transistor device and method of forming
US11791216B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2021 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | May 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6736
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes: forming, in a first device region of the semiconductor device, first nanostructures over a first fin that protrudes above a substrate; forming, in a second device region of the semiconductor device, second nanostructures over a second fin that protrudes above the substrate, where the first and the second nanostructures include a semiconductor material and extend parallel to an upper surface of the substrate; forming a dielectric material around the first and the second nanostructures; forming a first hard mask layer in the first device region around the first nanostructures and in the second device region around the second nanostructures; removing the first hard mask layer from the second device region after forming the first hard mask layer; and after removing the first hard mask layer, increasing a first thickness of the dielectric material around the second nanostructures by performing an oxidization process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.