High power module package structures
US11810775B2 · kind B2 · utility
0Cited by
17References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Jul 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/441
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes disposing a semiconductor die between a first high voltage isolation carrier and a second high voltage isolation carrier, disposing a first molding material in a space between the semiconductor die and the first high voltage isolation carrier, and disposing a conductive spacer between the semiconductor die and the second high voltage isolation carrier. The method further includes encapsulating the first molding material and the conductive spacer with a second molding material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.