Methods for pressure ramped plasma purge
US11817313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | May 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/3321
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include depositing material on the semiconductor substrate to a target thickness. The methods may include halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors. The methods may include purging the processing region of the semiconductor processing chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.