Termination structures with reduced dynamic output capacitance loss

US11817478B2 · kind B2 · utility

Assignee

• SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC · US

Inventors

• Jaume Roig-Guitart · Oudenaarde, BE
• Fredrik Allerstam · Solna, SE
• Thomas Neyer · Villach, AT
• Andrei Konstantinov · Linköping, SE
• Martin Domeij · Sollentuna, SE
• Jangkwon Lim · Nacka, SE

Key dates

• Filing date: Dec 23, 2020
• Grant date: Nov 14, 2023
• Expiry date: Dec 23, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8325

Abstract

In a general aspect, a semiconductor device can include a substrate of a first conductivity type, an active region disposed in the substrate, and a termination region disposed in the substrate adjacent to the active region. The termination region can include a junction termination extension (JTE) of a second conductivity type, where the second conductivity type is opposite the first conductivity type. The JTE can have a first depletion stopper region disposed in an upper portion of the JTE, a second depletion stopper region disposed in a lower portion of the JTE, and a high carrier mobility region disposed between the first depletion stopper region and the second depletion stopper region.