Magnetoresistive memory device including a plurality of reference layers
US11839162B2 · kind B2 · utility
1Cited by
17References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 25, 2021 |
| Grant date | Dec 5, 2023 |
| Priority date | — |
| Expiry date | Jan 29, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F10/3272
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Magnetoelectric or magnetoresistive memory cells may include a plurality of reference layers and optionally a plurality of free layers to enhance the tunneling magnetoresistance (TMR) ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.