Method for fabricating memory cell of magnetoresistive random access memory
US11849649B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2022 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Feb 13, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for fabricating memory cell of magnetoresistive RAM includes forming a memory stack structure on a first electrode layer. The memory stack structure includes a SAF layer to serve as a pinned layer; a magnetic free layer and a barrier layer sandwiched between the SAF layer and the magnetic free layer. A second electrode layer is then formed on the memory stack structure. The SAF layer includes a first magnetic layer, a second magnetic layer, and a spacer layer of a first metal element sandwiched between the first magnetic layer and the second magnetic layer. The first metal element is phase separated from a second metal element of the first and second magnetic layers, and the second metal element of the first magnetic layer and the second magnetic layer interfaces with the spacer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.