Patent · US Active

Data structures, methods and tiling engines for storing tiling information in a graphics processing system

US11861782B2 · kind B2 · utility

1Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 13, 2022
Grant dateJan 2, 2024
Priority date
Expiry dateDec 13, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T2210/52
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block. A tile is a valid tile for a primitive block if at least one primitive in the primitive block intersects that tile.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.