Sense amplifier, memory and control method of sense amplifier
US11862285B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 14, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | May 20, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier, a memory and a method for controlling the sense amplifier are provided. The sense amplifier includes: an amplification module configured to read data in a storage unit on a first or second bit line; a control module electrically connected to the amplification module. When data in the storage unit on the first bit line is read, in a first amplification phase of the sense amplifier, the control module configures the amplification module to include a first current mirror structure and connects a mirror terminal of the first current mirror structure to the second bit line; when data in the storage unit on the second bit line is read, in the first amplification phase of the sense amplifier, the control module configures the amplification module to include a second current mirror structure and connects a mirror terminal of the second current mirror structure to the first bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.