Coherent block read fulfillment
US11874783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2021 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | Mar 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coherent memory fabric includes a plurality of coherent master controllers and a coherent slave controller. The plurality of coherent master controllers each include a response data buffer. The coherent slave controller is coupled to the plurality of coherent master controllers. The coherent slave controller, responsive to determining a selected coherent block read command is guaranteed to have only one data response, sends a target request globally ordered message to the selected coherent master controller and transmits responsive data. The selected coherent master controller, responsive to receiving the target request globally ordered message, blocks any coherent probes to an address associated with the selected coherent block read command until receipt of the responsive data is acknowledged by a requesting client.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.