Ann Ling
8Patents
1h-index
15Co-inventors
44Inventor score
Filing activity: May 8, 2013 → Jan 11, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9261949B2 | Method for adaptive performance optimization of the soc | Emerging Cross-Sectional Technologies | 3 | Active |
| US10656696B1 | Reducing chiplet wakeup latency | Emerging Cross-Sectional Technologies | 1 | Active |
| US11281280B2 | Reducing chiplet wakeup latency | Emerging Cross-Sectional Technologies | 0 | Active |
| US11954033B1 | Page rinsing scheme to keep a directory page in an exclusive state in a single complex | Physics | 0 | Active |
| US12393532B2 | Coherent block read fulfillment | Physics | 0 | Active |
| US11803470B2 | Multi-level cache coherency protocol for cache line evictions | Physics | 0 | Active |
| US10503648B2 | Cache to cache data transfer acceleration techniques | Physics | 0 | Active |
| US11874783B2 | Coherent block read fulfillment | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.