III-nitride transistor with a modified drain access region

US11876130B2 · kind B2 · utility

Assignee

• Finwave Semiconductor, Inc. · US

Inventors

• Bin Lu · Pittsburgh, US
• Dongfei Pei · Newton, US
• Xiabing Lou · Belmont, US

Key dates

• Filing date: Dec 2, 2020
• Grant date: Jan 16, 2024
• Expiry date: Jan 2, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

This disclosure describes the structure and technology to modify the free electron density between the gate and drain electrodes of III-nitride semiconductor transistors. Electron density reduction regions (EDR regions) are disposed between the gate and the drain of the transistor structure. In certain embodiments, the EDR regions are created using trenches. In other embodiments, the EDR regions are created by implanting the regions with a species that reduces the free electrons in the channel layer. In another embodiment, the EDR regions are created by forming a cap layer over the barrier layer, wherein the cap layer reduces the free electrons in the channel beneath the cap layer. In another embodiment, a cap layer may be formed in the EDR regions, and doped regions may be created outside of the EDR regions, wherein the impurities act as electron donors.