Dynamic generation of ATPG mode signals for testing multipath memory circuit
US11879940B2 · kind B2 · utility
0Cited by
9References
16Claims
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Key dates
| Filing date | Jun 23, 2021 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Oct 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit includes a multipath memory having multiple cells and a plurality of sequence generators. Each sequence generator of the plurality of sequence generators drives one separate cell of the multiple cells via an automatic test pattern generator (ATPG) mode signal for each cell. The ATPG mode signal for each cell is configured via a sequence configuration input that controls a timing sequence to test each cell. The state of the ATPG mode signal of each cell selects whether test data or functional data is output from the respective cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.