Enabling efficient guest access to peripheral component interconnect express (PCIe) configuration space
US11880301B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2022 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Dec 21, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for enabling efficient guest OS access to PCIe configuration space are provided. In one set of embodiments, a hypervisor can reserve a single host physical memory page in the host physical memory of a host system and can populate the single host physical memory page with a value indicating non-presence of PCIe device functions. The hypervisor can then create, for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in the hypervisor's second-level page tables that maps the guest physical memory page to the single host physical memory page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.