Synchronization free cross pass binning through subpass interleaving
US11880924B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2021 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Dec 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of tiled rendering is provided which comprises dividing a frame to be rendered, into a plurality of tiles, receiving commands to execute a plurality of subpasses of the tiles and interleaving execution of same subpasses of multiple tiles of the frame. Interleaving execution of same subpasses of multiple tiles comprises executing a previously ordered first subpass of a second tile between execution of the previously ordered first subpass of a first tile and execution of a subsequently ordered second subpass of the first tile. The interleaving is performed, for example, by executing the plurality of subpasses in an order different from the order in which the commands to execute the plurality of subpasses are stored and issued. Alternatively, interleaving is performed by executing one or more subpasses as skip operations such that the plurality of subpasses are executed in the same order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.