Patent · US Active

Mitigation of duty-cycle distortion

US11881862B2 · kind B2 · utility

0Cited by

3References

39Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Udayakiran Kumar Yallamaraju · Kanchinakote, IN
Xia Li · San Diego, US
Pankaj Deshmukh · San Diego, US
Vajram Ghantasala · San Jose, US
Bin Yang · San Diego, US
Vishal Mishra · Kanchinakote, IN
Bharatheesha Sudarshan Jagirdar · San Diego, US
Arun Sundaresan Iyer · Bengaluru, IN
Amod Phadke · Kanchinakote, IN
Vanamali Bhat · Bengaluru, IN

Key dates

Filing date	Aug 17, 2021
Grant date	Jan 23, 2024
Priority date	—
Expiry date	Jan 9, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH03K2005/00195
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A system includes a first park circuit having a signal input, an output, and a control input. The system also includes a first signal path having an input and an output, wherein the input of the first signal path is coupled to the output of the first park circuit. The system also includes a second park circuit having a signal input, an output, and a control input, wherein the signal input of the second park circuit is coupled to the output of the first signal path. The system further includes a second signal path having an input and an output, wherein the input of the second signal path is coupled to the output of the second park circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.