Inter-node execution of configuration files on reconfigurable processors using network interface controller (NIC) buffers
US11886931B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Jan 16, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/4557
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The technology disclosed relates to inter-node execution of configuration files on reconfigurable processors using network interface controller (NIC) buffers. In particular, the technology disclosed relates to a runtime logic that is configured to execute configuration files that define applications and application data for applications using a first reconfigurable processor connected to a first host, and a second reconfigurable processor connected to a second host. The first reconfigurable processor is configured to push input data for the applications in a first plurality of buffers. The first host is configured to cause a first network interface controller (NIC) to stream the input data to a second plurality of buffers from the first plurality of buffers. The second host is configured to cause a second NIC to stream the input data to the second reconfigurable processor from the second plurality of buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.