Sense amplifier, memory, and method for controlling sense amplifier by configuring structures using switches
US11887655B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 14, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | May 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier includes an amplification module and a control module electrically connected to the amplification module. Herein, in a case of reading a data in a memory cell on a first bit line, at an offset compensation stage of the sense amplifier, the control module is arranged to configure the amplification module to include a first diode structure, a first current mirror structure, and a first inverter with an input terminal and an output terminal connected to each other. In a case of reading a data in a memory cell on a second bit line, at the offset compensation stage of the sense amplifier, the control module is arranged to configure the amplification module to include a second diode structure, a second current mirror structure, and a second inverter with an input terminal and an output terminal connected to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.