Reduce read command latency in partition command scheduling at a memory device
US11899972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2021 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Jan 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined. Responsive to determining that at least one of the timeout threshold criterion pertaining to the plurality of read partition command queues or the write threshold criterion pertaining to the plurality of write partition command queues is satisfied, partition commands of the plurality of read partition command queues is received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.