Patent · US Active

Variable clock adaptation in neural network processors

US11900240B2 · kind B2 · utility

0Cited by
3References
23Claims
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Key dates

Filing dateSep 16, 2020
Grant dateFeb 13, 2024
Priority date
Expiry dateDec 15, 2042

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and devices are provided to increase computational and/or power efficiency for one or more neural networks via a computationally driven closed-loop dynamic clock control. A clock frequency control word is generated based on information indicative of a current frame execution rate of a processing task of the neural network and a reference clock signal. A clock generator generates the clock signal of neural network based on the clock frequency control word. A reference frequency may be used to generate the clock frequency control word, and the reference frequency may be based on information indicative of a sparsity of data of a training frame.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.