Energy efficient memory array with optimized burst read and write data access
US11908542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2019 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Jun 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Prior knowledge of access pattern is leveraged to improve energy dissipation for general matrix operations. This improves memory access energy for a multitude of applications such as image processing, deep neural networks, and scientific computing workloads, for example. In some embodiments, prior knowledge of access pattern allows for burst read and/or write operations. As such, burst mode solution can provide energy savings in both READ (RD) and WRITE (WR) operations. For machine learning or inference, the weight values are known ahead in time (e.g., inference operation), and so the unused bytes in the cache line are exploited to store a sparsity map that is used for disabling read from either upper or lower half of the cache line, thus saving dynamic capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.