Chip structure with conductive via structure and method for forming the same
US11908790B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2021 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Mar 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13166
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip structure is provided. The chip structure includes a substrate. The chip structure includes a conductive line over the substrate. The chip structure includes a first passivation layer over the substrate and the conductive line. The chip structure includes a conductive pad over the first passivation layer covering the conductive line. The conductive pad is thicker and wider than the conductive line. The chip structure includes a first conductive via structure and a second conductive via structure passing through the first passivation layer and directly connected between the conductive pad and the conductive line. The chip structure includes a conductive pillar over the conductive pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.