Ting-Li Yang
19Patents
2h-index
30Co-inventors
46Inventor score
Filing activity: Aug 21, 2015 → Dec 1, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11855017B2 | Semiconductor device and method | Electricity | 3 | Active |
| US9586281B2 | Forming a solder joint between metal layers | Emerging Cross-Sectional Technologies | 2 | Active |
| US11908790B2 | Chip structure with conductive via structure and method for forming the same | Electricity | 2 | Active |
| US11955423B2 | Semiconductor device and method | Electricity | 2 | Active |
| US10269703B2 | Semiconductor device and method of forming the same | Electricity | 1 | Active |
| US11855028B2 | Hybrid micro-bump integration with redistribution layer | Electricity | 1 | Active |
| US11557508B2 | Semiconductor device structure having protection caps on conductive lines | Electricity | 0 | Active |
| US10252363B2 | Forming a solder joint between metal layers | Emerging Cross-Sectional Technologies | 0 | Active |
| US11862588B2 | Semiconductor device and method | Electricity | 0 | Active |
| US12412857B2 | Hybrid micro-bump integration with redistribution layer | Electricity | 0 | Active |
| US10748810B2 | Method of manufacturing an integrated inductor with protections caps on conductive lines | Electricity | 0 | Active |
| US12368120B2 | Semiconductor device and method | Electricity | 0 | Active |
| US12347722B2 | Semiconductor device structure with a protection cap at an end portion of a conductive line | Electricity | 0 | Active |
| US11901266B2 | Semiconductor device structure and method for forming the same | Electricity | 0 | Active |
| US11942398B2 | Semiconductor device having at least one via including concave portions on sidewall | Electricity | 0 | Active |
| US12057423B2 | Bump integration with redistribution layer | Electricity | 0 | Active |
| US11851321B2 | Micro-electro mechanical system and manufacturing method thereof | Performing Operations; Transporting | 0 | Active |
| US12243837B2 | Semiconductor device and method | Electricity | 0 | Active |
| US12266593B2 | Method of forming semiconductor device having at least one via including concave portions on sidewall | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.