Patent · US Active

Recall pending cache line eviction

US11940919B2 · kind B2 · utility

0Cited by
10References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 30, 2022
Grant dateMar 26, 2024
Priority date
Expiry dateAug 30, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1024
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

System and techniques for recall pending cache line eviction are described herein. A queue that includes a deferred memory request is kept for a cache line. Metadata for the queue is stored in a cache line tag. When a recall is needed, the metadata is written from the tag to a first recall storage, referenced by a memory request ID. After the recall request is transmitted, the memory request ID is written to a second recall storage referenced by the message ID of the recall request. Upon receipt of a response to the recall request, the queue for the cache line can be restored by using the message ID in the response to lookup the memory request ID from the second recall storage, then using the memory request ID to lookup the metadata from the first recall storage, and then writing the metadata into the tag for the cache line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.