Fast mapper restore for flush in processor
US11941398B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2022 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Dec 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for restoring a mapper of a processor core includes saving first information in a staging latch. The first information represents a newly dispatched first instruction of the processor core and is saved in an entry latch of a save-and-restore buffer. In response to reception of a flush command of the processor core, the restoration of the mapper is begun with the first information from the staging latch without waiting for a comparison of a flush tag of the flush command with the entry latch of the save-and-restore buffer. A processor core configured to perform the method described above is also provided. A processor core is also provided that includes a dispatch, a mapper, a save-and-restore buffer that includes entry latches and is connected to the mapper via at least one pipeline, and a register disposed in the at least one pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.