Peak voltage amplitude detectors tolerant to process variation and device mismatch and related methods
US11953527B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2022 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Aug 24, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1532
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A peak detector comprises multiple small-size amplitude detection circuits coupled in parallel to signal inputs at which a signal is received from a VCO. Each amplitude detection circuit generates a voltage on an output, indicating a voltage peak or amplitude of a first signal input and a second signal input (specifically, differential output of VCO). At a given time, only one small-size amplitude detection circuit is activated to load VCO, reducing the impact on LC resonant frequency. The plurality of small-size detection circuits work sequentially, and an automatic averaging of their outputs can significantly improve the peak detector fluctuation (caused by process variation and device mismatch) compared to each single small-size amplitude detection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.