Encapsulation process for double-sided cooled packages
US11955347B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2021 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Jul 20, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3735
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One or more electronic devices that are mounted on a substrate, including at least one cooling plate in contact with the one or more electronic devices, are encapsulated. The substrate is clamped between a first mold half and a second mold half which define a molding cavity for molding the one or more electronic devices. A cavity insert movably located in the first mold half is projected into the cavity in order to contact and apply a sealing pressure onto the at least one cooling plate. After introducing a molding compound into the cavity at a first fill pressure, the molding compound in the cavity is packed by applying a second fill pressure which is higher than the first fill pressure. During this time, the sealing pressure is maintained at values that are higher than the first fill pressure and the second fill pressure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.