Memory-side cache directory-based request queue
US11960768B2 · kind B2 · utility
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Key dates
| Filing date | Aug 30, 2022 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Oct 18, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and techniques for a memory-side cache directory-based request queue are described herein. A memory request is received at an interface of a memory device. One or more fields of the memory request are written into an entry of a directory data structure. The identifier of the entry is pushed onto a queue. To perform the memory request, the identifier is popped off of the queue and a field of the memory request is retrieved from the entry of the directory data structure using the identifier. Then, a process on the memory request can be performed using the field retrieved from the entry of the directory data structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.