Integrated circuit devices including a via and methods of forming the same
US11978668B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2021 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jun 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/535
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices including a via and methods of forming the same are provided. The methods may include forming a conductive wire structure on a substrate. The conductive wire structure may include a first insulating layer and a conductive wire stack in the first insulating layer, and the conductive wire stack may include a conductive wire and a mask layer stacked on the substrate. The method may also include forming a recess in the first insulating layer by removing the mask layer, the recess exposing the conductive wire, forming an etch stop layer and then a second insulating layer on the first insulating layer and in the recess of the first insulating layer, and forming a conductive via extending through the second insulating layer and the etch stop layer and contacting the conductive wire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.