Three-dimensional memory devices and methods for forming the same

US11996152B2 · kind B2 · utility

Assignee

• YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

• Kun Zhang · Hubei, CN
• Yuancheng Yang · Hubei, CN
• Wenxi Zhou · 红钢城街道, CN
• Wei Liu · 红钢城街道, CN
• Zhiliang Xia · 红钢城街道, CN
• Liang Chen · 红钢城街道, CN
• Yanhong Wang · Beijing, CN

Key dates

• Filing date: Sep 21, 2021
• Grant date: May 28, 2024
• Expiry date: Oct 8, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/00
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, a third semiconductor structure, a first bonding interface between the first semiconductor structure and the second semiconductor structure, and a second bonding interface between the first semiconductor structure and the third semiconductor structure. The first semiconductor structure includes an array of NAND memory strings and a first semiconductor layer in contact with sources of the array of NAND memory strings. The second semiconductor structure includes a first peripheral circuit of the array of NAND memory strings including a first transistor, and a second semiconductor layer in contact with the first transistor. A third semiconductor structure includes a second peripheral circuit of the array of NAND memory strings including a second transistor, and a third semiconductor layer in contact with the second transistor. The second semiconductor layer is between the first bonding interface and the first peripheral circuit. The second peripheral circuit is between the second bonding interface and the third semiconductor layer.