Ferroelectric field effect transistors having enhanced memory window and methods of making the same
US11996462B2 · kind B2 · utility
1Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2020 |
| Grant date | May 28, 2024 |
| Priority date | — |
| Expiry date | Oct 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/033
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A ferroelectric transistor includes a semiconductor channel comprising a semiconductor material, a strained and/or defect containing ferroelectric gate dielectric layer located on a surface of the semiconductor channel, a source region located on a first end portion of the semiconductor channel, and a drain region located on a second end portion of the semiconductor channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.