Waveform based reconstruction for emulation
US12001317B2 · kind B2 · utility
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17References
20Claims
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Key dates
| Filing date | Jun 27, 2023 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Jun 27, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.