Multiple-pass programming of memory cells using temporary parity generation
US12001721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2022 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Aug 25, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatuses include receiving a write command including user data. The write command is directed to a portion of memory including a first and second block and a first and second user data portion are directed to the first and second block. Temporary parity data is generated using the first and second user data portions. The temporary parity data and the first and second user data portions are stored in a buffer. Portions of the first and second block are programmed with two programming passes. The first and second user data portions in the buffer are invalidated in response to a completion of the second programming pass of the portions of the first and second blocks. The temporary parity data is maintained in the buffer until a second programming pass of the first and second block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.