Method for fabricating electronic package
US12009340B2 · kind B2 · utility
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2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2021 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Sep 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic package and a method for fabricating the same are provided. Two packaging modules are stacked on each other. An area that an electronic package occupies a mother board is reduced during a subsequent process of fabricating an electronic product. Therefore, the electronic product has a reduced size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.