Package structure, package-on-package structure and method of fabricating the same
US12015017B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2021 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Jul 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.