Patent · US Active

Reducing keep-out-zone area for a semiconductor device

US12021060B2 · kind B2 · utility

0Cited by

5References

18Claims

0Family size

Assignee

Western Digital Technologies, Inc. · US

Inventors

Kevin Du · San Jose, US
Hope Chiu · Shanghai, CN
Zengyu Zhou · Shanghai, CN
Alex Zhang · Shanghai, CN
Vincent Jiang · Shanghai, CN
Shixing Zhu · Shanghai, CN
Paul Qu · Shanghai, CN
Yi-Hsuan Su · Shanghai, CN
Rui Yuan · 红钢城街道, CN

Key dates

Filing date	Sep 22, 2020
Grant date	Jun 25, 2024
Priority date	—
Expiry date	Sep 22, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19105
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A packaged semiconductor includes a substrate and a first component disposed on the substrate. The package includes an underfill that is dispensed under and around the first component. The package also includes a second component disposed on the substrate adjacent to the first component that provides a border to the underfill.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.