Packaged memory device with flip chip and wire bond dies

US12021061B2 · kind B2 · utility

Assignee

• Western Digital Technologies, Inc. · US

Inventors

• Rui Yuan · 红钢城街道, CN
• Hope Chiu · Shanghai, CN
• Paul Qu · Shanghai, CN
• Kevin Du · San Jose, US
• Zengyu Zhou · Shanghai, CN
• Yi-Hsuan Su · Shanghai, CN
• Shixing Zhu · Shanghai, CN

Key dates

• Filing date: Mar 4, 2021
• Grant date: Jun 25, 2024
• Expiry date: Nov 23, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2225/06562
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A memory device includes a substrate, a controller die, a flip chip die, first and second silicon dies, and bond wires. The controller and flip chip dies are attached to the substrate using connection balls and in electrical communication with each other. The first and second silicon dies include respective first and second contact pad surfaces. The bond wires electrically connect the contact pad surfaces to the substrate so the first and second silicon dies communicate with the controller die. The flip chip die and first and second silicon dies are NAND dies, the flip chip die is configured as SLC memory, and the silicon dies are configured as one of MLC memory, TLC memory, or QLC memory.