Patent · US Active

Layer structure with an intermetallic phase layer and a chip package that includes the layer structure

US12023762B2 · kind B2 · utility

1Cited by

3References

22Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Alexander Heinrich · Bad Abbach, DE
Alexander Roth · Griesheim, DE
Catharina Wille · Regensburg, DE

Key dates

Filing date	Dec 23, 2022
Grant date	Jul 2, 2024
Priority date	—
Expiry date	Dec 23, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2224/32225
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.