Vertical memory devices and methods for operating the same

US12027207B2 · kind B2 · utility

Assignee

• YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

• Dongxue Zhao · Hubei, CN
• Tao Yang · Zhejiang, CN
• Yuancheng Yang · Hubei, CN
• Lei Liu · Granger, US
• Di Wang · Timonium, US
• Kun Zhang · Hubei, CN
• Wenxi Zhou · 红钢城街道, CN
• Zhiliang Xia · 红钢城街道, CN
• Zongliang Huo · 红钢城街道, CN

Key dates

• Filing date: Dec 30, 2021
• Grant date: Jul 2, 2024
• Expiry date: May 25, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/20
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

This disclosure is directed to methods for performing operations on a memory device. The memory device can include a bottom select gate, a plate line above the bottom select gate, a word line above the plate line, a pillar extending through the bottom select gate, the plate line, and the word line, a source line under the pillar, a drain cap above the pillar and a bit line formed above the drain cap. The method can include applying a first positive voltage bias to the bottom select gate and applying a second positive voltage bias to the word line. The method can also include applying a third positive voltage bias to the bit line after the word line reaches the second positive voltage bias. The method can further include applying a ground voltage to the word line and applying the ground voltage to the bit line.