Resistive random access memory (RRAM) structure and forming method thereof
US12041863B2 · kind B2 · utility
1Cited by
2References
14Claims
0Family size
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Key dates
| Filing date | Jan 27, 2021 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Oct 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
Abstract
A resistive random access memory (RRAM) structure includes a RRAM cell, spacers and a dielectric layer. The RRAM cell is disposed on a substrate. The spacers are disposed beside the RRAM cell, wherein widths of top surfaces of the spacers are larger than or equal to widths of bottom surfaces of the spacers. The dielectric layer blanketly covers the substrate and sandwiches the RRAM cell, wherein the spacers are located in the dielectric layer. A method for forming said resistive random access memory (RRAM) structure is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.