Backside wafer dopant activation
US12046473B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Jun 25, 2021 |
| Grant date | Jul 23, 2024 |
| Priority date | — |
| Expiry date | Nov 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/112
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are methods for backside wafer dopant activation using a low-temperature ion implant. In some embodiments, a method may include forming a semiconductor device atop a first main side of a substrate, and performing a low-temperature ion implant to a second main side of the substrate, wherein the first main side of the substrate is opposite the second main side of the substrate. The method may further include performing a second ion implant to the second main side of the substrate to form a collector layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.