Molded direct contact interconnect substrate and methods of making same
US12062550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2023 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Jul 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68359
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure concerns method of making a molded substrate, comprising providing a carrier; forming a first conductive layer and first vertical conductive contacts over the carrier; disposing a first layer of encapsulant over the first conductive layer and first vertical conductive contacts; planarizing the first vertical conductive contacts and the first layer of encapsulant to form a first planar surface; forming a second conductive layer and second vertical conductive contacts over the first layer of encapsulant and configured to be electrically coupled with the first conductive layer and first vertical conductive contacts; disposing a second layer of encapsulant over the second conductive layer and second vertical conductive contacts; planarizing the second vertical conductive contacts and the second layer of encapsulant to form a second planar surface; and forming first conductive bumps over the second planar surface, opposite the carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.