Deca Technologies USA, Inc.
21Patents
21Active
21Granted
58Portfolio score
Filing activity: Jun 17, 2020 → Nov 20, 2024
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11056453B2 | Stackable fully molded semiconductor structure with vertical interconnects | Electricity | 2 | Active |
| US11444051B2 | Fully molded semiconductor structure with face mounted passives and method of making the same | Electricity | 1 | Active |
| US11973051B2 | Molded direct contact interconnect structure without capture pads and method for the same | Electricity | 0 | Active |
| US12205881B2 | Semiconductor assembly comprising a 3D block and method of making the same | Electricity | 0 | Active |
| US12424450B2 | Embedded component interposer or substrate comprising displacement compensation traces (DCTs) and method of making the same | Electricity | 0 | Active |
| US12261140B2 | Stackable fully molded semiconductor structure with vertical interconnects | Electricity | 0 | Active |
| US11728248B2 | Fully molded semiconductor structure with through silicon via (TSV) vertical interconnects | Electricity | 0 | Active |
| US12424527B2 | Multi-chip or multi-chiplet fan-out device for laminate and leadframe packages | Electricity | 0 | Active |
| US12381154B2 | Fully molded bridge interposer and method of making the same | Electricity | 0 | Active |
| US12057373B2 | Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects and method of making the same | Electricity | 0 | Active |
| US11791207B2 | Unit specific variable or adaptive metal fill and system and method for the same | Electricity | 0 | Active |
| US12334396B2 | Unit specific variable or adaptive metal fill and system and method for the same | Electricity | 0 | Active |
| US12300561B2 | Fully molded structure with multi-height components comprising backside conductive material and method for making the same | Electricity | 0 | Active |
| US11887862B2 | Method for redistribution layer (RDL) repair by mitigating at least one defect with a custom RDL | Electricity | 0 | Active |
| US12170261B2 | Molded direct contact interconnect structure without capture pads and method for the same | Electricity | 0 | Active |
| US12362322B2 | Method of making a fan-out semiconductor assembly with an intermediate carrier | Electricity | 0 | Active |
| US11616003B2 | Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects | Electricity | 0 | Active |
| US12062550B2 | Molded direct contact interconnect substrate and methods of making same | Electricity | 0 | Active |
| US11538759B2 | Fully molded bridge interposer and method of making the same | Electricity | 0 | Active |
| US11664321B2 | Multi-step high aspect ratio vertical interconnect and method of making the same | Electricity | 0 | Active |
| US11749534B1 | Quad flat no-lead (QFN) package without leadframe and direct contact interconnect build-up structure and method for making the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.