Patent · US Active

Semiconductor packages including recesses to contain solder

US12062589B2 · kind B2 · utility

0Cited by

0References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Adrian Lis · Regensburg, DE
Michael Ledutke · Ribnitz-Damgarten, DE

Key dates

Filing date	Jun 29, 2021
Grant date	Aug 13, 2024
Priority date	—
Expiry date	Sep 24, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH01L24/00
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

One example of a semiconductor package includes a first substrate, a second substrate, a semiconductor die, and a spacer. The semiconductor die is attached to the first substrate. The spacer is attached to the semiconductor die and attached to the second substrate via solder. A surface of the second substrate facing the spacer includes a plurality of recesses extending from proximate at least one edge of the spacer to contain a portion of the solder.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.